After Sheffield cryo chip specialist sureCore’s launch of a range of cryogenic IP in 180 nm and 22nm test chips, the company has teamed with packaging specialist Sarcina who designed a custom package specifically for use at cryogenic temperatures.

“This represents another critical step in our programme to make Cryo-CMOS available for the Quantum Computing (QC) ecosystem,” says sureCore CEO Paul Wells, “our CryoMemrange of memory IP is silicon proven in addition to validating our library re characterisation service. We are also offering a range of cryogenic design capabilities to help QC companies design the control/interface chips which need to be migrated into the cryostat alongside the qubits.”

See the full article on ElectronicsWeekly.com